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427 lines
16 KiB
C
427 lines
16 KiB
C
4 weeks ago
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/**
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******************************************************************************
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* @file stm32u0xx_hal_dac_ex.c
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* @author MCD Application Team
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* @brief Extended DAC HAL module driver.
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* This file provides firmware functions to manage the extended
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* functionalities of the DAC peripheral.
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*
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*
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******************************************************************************
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* @attention
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*
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* Copyright (c) 2023 STMicroelectronics.
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* All rights reserved.
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*
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* This software is licensed under terms that can be found in the LICENSE file
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* in the root directory of this software component.
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* If no LICENSE file comes with this software, it is provided AS-IS.
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*
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******************************************************************************
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@verbatim
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==============================================================================
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##### How to use this driver #####
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==============================================================================
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[..]
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*** Signal generation operation ***
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===================================
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[..]
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(+) Use HAL_DACEx_TriangleWaveGenerate() to generate Triangle signal.
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(+) Use HAL_DACEx_NoiseWaveGenerate() to generate Noise signal.
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(+) HAL_DACEx_SelfCalibrate to calibrate one DAC channel.
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(+) HAL_DACEx_SetUserTrimming to set user trimming value.
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(+) HAL_DACEx_GetTrimOffset to retrieve trimming value (factory setting
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after reset, user setting if HAL_DACEx_SetUserTrimming have been used
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at least one time after reset).
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@endverbatim
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******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "stm32u0xx_hal.h"
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/** @addtogroup STM32U0xx_HAL_Driver
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* @{
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*/
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#ifdef HAL_DAC_MODULE_ENABLED
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#if defined(DAC1)
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/** @defgroup DACEx DACEx
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* @brief DAC Extended HAL module driver
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* @{
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*/
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Delay for DAC minimum trimming time. */
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/* Note: minimum time needed between two calibration steps */
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/* The delay below is specified under conditions: */
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/* - DAC channel output buffer enabled */
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/* Literal set to maximum value (refer to device datasheet, */
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/* electrical characteristics, parameter "tTRIM"). */
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/* Unit: us */
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#define DAC_DELAY_TRIM_US (50UL) /*!< Delay for DAC minimum trimming time */
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Exported functions --------------------------------------------------------*/
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/** @defgroup DACEx_Exported_Functions DACEx Exported Functions
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* @{
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*/
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/** @defgroup DACEx_Exported_Functions_Group2 IO operation functions
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* @brief Extended IO operation functions
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*
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@verbatim
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==============================================================================
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##### Extended features functions #####
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==============================================================================
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[..] This section provides functions allowing to:
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(+) Start conversion.
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(+) Stop conversion.
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(+) Start conversion and enable DMA transfer.
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(+) Stop conversion and disable DMA transfer.
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(+) Get result of conversion.
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(+) Get result of dual mode conversion.
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@endverbatim
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* @{
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*/
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/**
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* @brief Enable or disable the selected DAC channel wave generation.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @param Amplitude Select max triangle amplitude.
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* This parameter can be one of the following values:
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* @arg DAC_TRIANGLEAMPLITUDE_1: Select max triangle amplitude of 1
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* @arg DAC_TRIANGLEAMPLITUDE_3: Select max triangle amplitude of 3
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* @arg DAC_TRIANGLEAMPLITUDE_7: Select max triangle amplitude of 7
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* @arg DAC_TRIANGLEAMPLITUDE_15: Select max triangle amplitude of 15
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* @arg DAC_TRIANGLEAMPLITUDE_31: Select max triangle amplitude of 31
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* @arg DAC_TRIANGLEAMPLITUDE_63: Select max triangle amplitude of 63
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* @arg DAC_TRIANGLEAMPLITUDE_127: Select max triangle amplitude of 127
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* @arg DAC_TRIANGLEAMPLITUDE_255: Select max triangle amplitude of 255
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* @arg DAC_TRIANGLEAMPLITUDE_511: Select max triangle amplitude of 511
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* @arg DAC_TRIANGLEAMPLITUDE_1023: Select max triangle amplitude of 1023
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* @arg DAC_TRIANGLEAMPLITUDE_2047: Select max triangle amplitude of 2047
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* @arg DAC_TRIANGLEAMPLITUDE_4095: Select max triangle amplitude of 4095
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
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{
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/* Check the DAC peripheral handle */
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if (hdac == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Enable the triangle wave generation for the selected DAC channel */
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MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
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(DAC_CR_WAVE1_1 | Amplitude) << (Channel & 0x10UL));
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Enable or disable the selected DAC channel wave generation.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @param Amplitude Unmask DAC channel LFSR for noise wave generation.
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* This parameter can be one of the following values:
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* @arg DAC_LFSRUNMASK_BIT0: Unmask DAC channel LFSR bit0 for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS1_0: Unmask DAC channel LFSR bit[1:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS2_0: Unmask DAC channel LFSR bit[2:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS3_0: Unmask DAC channel LFSR bit[3:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS4_0: Unmask DAC channel LFSR bit[4:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS5_0: Unmask DAC channel LFSR bit[5:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS6_0: Unmask DAC channel LFSR bit[6:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS7_0: Unmask DAC channel LFSR bit[7:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS8_0: Unmask DAC channel LFSR bit[8:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS9_0: Unmask DAC channel LFSR bit[9:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS10_0: Unmask DAC channel LFSR bit[10:0] for noise wave generation
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* @arg DAC_LFSRUNMASK_BITS11_0: Unmask DAC channel LFSR bit[11:0] for noise wave generation
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Amplitude)
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{
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/* Check the DAC peripheral handle */
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if (hdac == NULL)
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{
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return HAL_ERROR;
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}
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(Amplitude));
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_BUSY;
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/* Enable the noise wave generation for the selected DAC channel */
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MODIFY_REG(hdac->Instance->CR, ((DAC_CR_WAVE1) | (DAC_CR_MAMP1)) << (Channel & 0x10UL),
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(DAC_CR_WAVE1_0 | Amplitude) << (Channel & 0x10UL));
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/* Change DAC state */
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hdac->State = HAL_DAC_STATE_READY;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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/* Return function status */
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return HAL_OK;
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}
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/**
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* @brief Run the self calibration of one DAC channel.
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param sConfig DAC channel configuration structure.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @retval Updates DAC_TrimmingValue. , DAC_UserTrimming set to DAC_UserTrimming
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* @retval HAL status
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* @note Calibration runs about 7 ms.
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*/
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HAL_StatusTypeDef HAL_DACEx_SelfCalibrate(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
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{
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HAL_StatusTypeDef status = HAL_OK;
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__IO uint32_t tmp;
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uint32_t trimmingvalue;
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uint32_t delta;
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__IO uint32_t wait_loop_index;
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/* store/restore channel configuration structure purpose */
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uint32_t oldmodeconfiguration;
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Check the DAC handle allocation */
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/* Check if DAC running */
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if ((hdac == NULL) || (sConfig == NULL))
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{
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status = HAL_ERROR;
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}
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else if (hdac->State == HAL_DAC_STATE_BUSY)
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{
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status = HAL_ERROR;
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}
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else
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{
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Store configuration */
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oldmodeconfiguration = (hdac->Instance->MCR & (DAC_MCR_MODE1 << (Channel & 0x10UL)));
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/* Disable the selected DAC channel */
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CLEAR_BIT((hdac->Instance->CR), (DAC_CR_EN1 << (Channel & 0x10UL)));
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/* Set mode in MCR for calibration */
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MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), 0U);
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/* Set DAC Channel1 DHR register to the middle value */
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tmp = (uint32_t)hdac->Instance;
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if (Channel == DAC_CHANNEL_1)
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{
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tmp += DAC_DHR12R1_ALIGNMENT(DAC_ALIGN_12B_R);
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}
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*(__IO uint32_t *) tmp = 0x0800UL;
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/* Enable the selected DAC channel calibration */
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/* i.e. set DAC_CR_CENx bit */
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SET_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
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/* Init trimming counter */
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/* Medium value */
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trimmingvalue = 16UL;
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delta = 8UL;
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while (delta != 0UL)
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{
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/* Set candidate trimming */
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MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
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/* Wait minimum time needed between two calibration steps (OTRIM) */
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/* Wait loop initialization and execution */
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/* Note: Variable divided by 2 to compensate partially CPU processing cycles, scaling in us split to not exceed */
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/* 32 bits register capacity and handle low frequency. */
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wait_loop_index = ((DAC_DELAY_TRIM_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
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while (wait_loop_index != 0UL)
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{
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wait_loop_index--;
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}
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if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL)))
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{
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/* DAC_SR_CAL_FLAGx is HIGH try higher trimming */
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trimmingvalue -= delta;
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}
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else
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{
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/* DAC_SR_CAL_FLAGx is LOW try lower trimming */
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trimmingvalue += delta;
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}
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delta >>= 1UL;
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}
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/* Still need to check if right calibration is current value or one step below */
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/* Indeed the first value that causes the DAC_SR_CAL_FLAGx bit to change from 0 to 1 */
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/* Set candidate trimming */
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MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
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/* Wait minimum time needed between two calibration steps (OTRIM) */
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/* Wait loop initialization and execution */
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/* Note: Variable divided by 2 to compensate partially CPU processing cycles, scaling in us split to not exceed */
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/* 32 bits register capacity and handle low frequency. */
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wait_loop_index = ((DAC_DELAY_TRIM_US / 10UL) * ((SystemCoreClock / (100000UL * 2UL)) + 1UL));
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while (wait_loop_index != 0UL)
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{
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wait_loop_index--;
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}
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if ((hdac->Instance->SR & (DAC_SR_CAL_FLAG1 << (Channel & 0x10UL))) == 0UL)
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{
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/* Trimming is actually one value more */
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trimmingvalue++;
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/* Set right trimming */
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MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (trimmingvalue << (Channel & 0x10UL)));
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}
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/* Disable the selected DAC channel calibration */
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/* i.e. clear DAC_CR_CENx bit */
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CLEAR_BIT((hdac->Instance->CR), (DAC_CR_CEN1 << (Channel & 0x10UL)));
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sConfig->DAC_TrimmingValue = trimmingvalue;
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sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
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/* Restore configuration */
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MODIFY_REG(hdac->Instance->MCR, (DAC_MCR_MODE1 << (Channel & 0x10UL)), oldmodeconfiguration);
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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}
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return status;
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}
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/**
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* @brief Set the trimming mode and trimming value (user trimming mode applied).
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* @param hdac pointer to a DAC_HandleTypeDef structure that contains
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* the configuration information for the specified DAC.
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* @param sConfig DAC configuration structure updated with new DAC trimming value.
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @param NewTrimmingValue DAC new trimming value
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* @retval HAL status
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*/
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HAL_StatusTypeDef HAL_DACEx_SetUserTrimming(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel,
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uint32_t NewTrimmingValue)
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{
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HAL_StatusTypeDef status = HAL_OK;
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(Channel));
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assert_param(IS_DAC_NEWTRIMMINGVALUE(NewTrimmingValue));
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/* Check the DAC handle and channel configuration struct allocation */
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if ((hdac == NULL) || (sConfig == NULL))
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{
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status = HAL_ERROR;
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}
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else
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{
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/* Process locked */
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__HAL_LOCK(hdac);
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/* Set new trimming */
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MODIFY_REG(hdac->Instance->CCR, (DAC_CCR_OTRIM1 << (Channel & 0x10UL)), (NewTrimmingValue << (Channel & 0x10UL)));
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/* Update trimming mode */
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sConfig->DAC_UserTrimming = DAC_TRIMMING_USER;
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sConfig->DAC_TrimmingValue = NewTrimmingValue;
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/* Process unlocked */
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__HAL_UNLOCK(hdac);
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}
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return status;
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}
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/**
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* @brief Return the DAC trimming value.
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* @param hdac DAC handle
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* @param Channel The selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_CHANNEL_1: DAC Channel1 selected
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* @retval Trimming value : range: 0->31
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*
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*/
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uint32_t HAL_DACEx_GetTrimOffset(const DAC_HandleTypeDef *hdac, uint32_t Channel)
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{
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/* Check the parameter */
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assert_param(IS_DAC_CHANNEL(Channel));
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/* Retrieve trimming */
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return ((hdac->Instance->CCR & (DAC_CCR_OTRIM1 << (Channel & 0x10UL))) >> (Channel & 0x10UL));
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}
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/**
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||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|
||
|
|
||
|
#endif /* DAC1 */
|
||
|
|
||
|
#endif /* HAL_DAC_MODULE_ENABLED */
|
||
|
|
||
|
/**
|
||
|
* @}
|
||
|
*/
|