|
|
@ -1,21 +1,4 @@
|
|
|
|
const registers = packed struct {
|
|
|
|
const mode = enum(u32) {
|
|
|
|
moder: u32,
|
|
|
|
|
|
|
|
otyper: u32,
|
|
|
|
|
|
|
|
ospeedr: u32,
|
|
|
|
|
|
|
|
pupdr: u32,
|
|
|
|
|
|
|
|
idr: u32,
|
|
|
|
|
|
|
|
odr: u32,
|
|
|
|
|
|
|
|
bsrr: u32,
|
|
|
|
|
|
|
|
lckr: u32,
|
|
|
|
|
|
|
|
afr: u64,
|
|
|
|
|
|
|
|
brr: u32,
|
|
|
|
|
|
|
|
ascr: u32,
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
const driver = struct {
|
|
|
|
|
|
|
|
port: *registers,
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
const mode = enum(u32) {
|
|
|
|
|
|
|
|
alternate_0 = 0,
|
|
|
|
alternate_0 = 0,
|
|
|
|
alternate_1,
|
|
|
|
alternate_1,
|
|
|
|
alternate_2,
|
|
|
|
alternate_2,
|
|
|
@ -35,11 +18,24 @@ const driver = struct {
|
|
|
|
input,
|
|
|
|
input,
|
|
|
|
output,
|
|
|
|
output,
|
|
|
|
analog,
|
|
|
|
analog,
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
pub fn set_mode(self: driver, pin: u4, m: mode) void {
|
|
|
|
const driver_stm32 = packed struct {
|
|
|
|
|
|
|
|
moder: u32,
|
|
|
|
|
|
|
|
otyper: u32,
|
|
|
|
|
|
|
|
ospeedr: u32,
|
|
|
|
|
|
|
|
pupdr: u32,
|
|
|
|
|
|
|
|
idr: u32,
|
|
|
|
|
|
|
|
odr: u32,
|
|
|
|
|
|
|
|
bsrr: u32,
|
|
|
|
|
|
|
|
lckr: u32,
|
|
|
|
|
|
|
|
afr: u64,
|
|
|
|
|
|
|
|
brr: u32,
|
|
|
|
|
|
|
|
ascr: u32,
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn set_mode(self: *driver_stm32, pin: u4, m: mode) void {
|
|
|
|
const offset = 2 * @as(u5, pin);
|
|
|
|
const offset = 2 * @as(u5, pin);
|
|
|
|
const moder = self.port.moder & ~(@as(u32, 3) << offset);
|
|
|
|
const moder = self.moder & ~(@as(u32, 3) << offset);
|
|
|
|
|
|
|
|
|
|
|
|
const mask: u32 = switch (m) {
|
|
|
|
const mask: u32 = switch (m) {
|
|
|
|
.input => 0,
|
|
|
|
.input => 0,
|
|
|
@ -48,28 +44,28 @@ const driver = struct {
|
|
|
|
else => 2,
|
|
|
|
else => 2,
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
self.port.moder = moder | (mask << offset);
|
|
|
|
self.moder = moder | (mask << offset);
|
|
|
|
|
|
|
|
|
|
|
|
if (mask == 2) {
|
|
|
|
if (mask == 2) {
|
|
|
|
const afr_offset = (4 * @as(u6, pin));
|
|
|
|
const afr_offset = (4 * @as(u6, pin));
|
|
|
|
const afr = self.port.afr & ~(@as(u64, 0xF) << afr_offset);
|
|
|
|
const afr = self.afr & ~(@as(u64, 0xF) << afr_offset);
|
|
|
|
self.port.afr = afr | (@as(u64, @intFromEnum(m)) << afr_offset);
|
|
|
|
self.afr = afr | (@as(u64, @intFromEnum(m)) << afr_offset);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
pub fn toggle(self: driver, pin: u4) void {
|
|
|
|
pub fn toggle(self: *driver_stm32, pin: u4) void {
|
|
|
|
self.port.odr ^= @as(u32, 1) << pin;
|
|
|
|
self.odr ^= @as(u32, 1) << pin;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
pub fn set(self: driver, pin: u4) void {
|
|
|
|
pub fn set(self: *driver_stm32, pin: u4) void {
|
|
|
|
self.port.odr |= @as(u32, 1) << pin;
|
|
|
|
self.odr |= @as(u32, 1) << pin;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
pub fn clear(self: driver, pin: u4) void {
|
|
|
|
pub fn clear(self: *driver_stm32, pin: u4) void {
|
|
|
|
self.port.odr &= ~(@as(u32, 1) << pin);
|
|
|
|
self.odr &= ~(@as(u32, 1) << pin);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
pub fn write(self: driver, pin: u4, val: bool) void {
|
|
|
|
pub fn write(self: *driver_stm32, pin: u4, val: bool) void {
|
|
|
|
if (val) {
|
|
|
|
if (val) {
|
|
|
|
self.set(pin);
|
|
|
|
self.set(pin);
|
|
|
|
} else {
|
|
|
|
} else {
|
|
|
@ -77,17 +73,47 @@ const driver = struct {
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn read(self: driver_stm32, pin: u4) bool {
|
|
|
|
|
|
|
|
return (self.idr & @as(u32, 1) << pin) != 0;
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
const driver = struct {
|
|
|
|
|
|
|
|
const lld_type = driver_stm32;
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
lld: *lld_type,
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn set_mode(self: driver, pin: u4, m: mode) void {
|
|
|
|
|
|
|
|
self.lld.set_mode(pin, m);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn toggle(self: driver, pin: u4) void {
|
|
|
|
|
|
|
|
self.lld.toggle(pin);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn set(self: driver, pin: u4) void {
|
|
|
|
|
|
|
|
self.lld.set(pin);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn clear(self: driver, pin: u4) void {
|
|
|
|
|
|
|
|
self.lld.clear(pin);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pub fn write(self: driver, pin: u4, val: bool) void {
|
|
|
|
|
|
|
|
self.lld.write(pin, val);
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
pub fn read(self: driver, pin: u4) bool {
|
|
|
|
pub fn read(self: driver, pin: u4) bool {
|
|
|
|
return (self.port.idr & @as(u32, 1) << pin) != 0;
|
|
|
|
return self.lld.read(pin);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
pub const gpioa = driver { .port = @ptrFromInt(0x48000000) };
|
|
|
|
pub const gpioa = driver { .lld = @ptrFromInt(0x48000000) };
|
|
|
|
pub const gpiob = driver { .port = @ptrFromInt(0x48000400) };
|
|
|
|
pub const gpiob = driver { .lld = @ptrFromInt(0x48000400) };
|
|
|
|
pub const gpioc = driver { .port = @ptrFromInt(0x48000800) };
|
|
|
|
pub const gpioc = driver { .lld = @ptrFromInt(0x48000800) };
|
|
|
|
pub const gpiod = driver { .port = @ptrFromInt(0x48000C00) };
|
|
|
|
pub const gpiod = driver { .lld = @ptrFromInt(0x48000C00) };
|
|
|
|
pub const gpioe = driver { .port = @ptrFromInt(0x48001000) };
|
|
|
|
pub const gpioe = driver { .lld = @ptrFromInt(0x48001000) };
|
|
|
|
pub const gpiof = driver { .port = @ptrFromInt(0x48001400) };
|
|
|
|
pub const gpiof = driver { .lld = @ptrFromInt(0x48001400) };
|
|
|
|
pub const gpiog = driver { .port = @ptrFromInt(0x48001800) };
|
|
|
|
pub const gpiog = driver { .lld = @ptrFromInt(0x48001800) };
|
|
|
|
pub const gpioh = driver { .port = @ptrFromInt(0x48001C00) };
|
|
|
|
pub const gpioh = driver { .lld = @ptrFromInt(0x48001C00) };
|
|
|
|
|
|
|
|
|
|
|
|