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increase signal buffers; fix oversample

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pull/3/head
Clyne 4 years ago
parent 716be4fc87
commit ec2e1fd5c6
11 changed files with 419 additions and 425 deletions
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10
ChibiOS_20.3.2/os/hal/ports/STM32/STM32H7xx/hal_lld.c
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@ -168,11 +168,14 @@ void hal_lld_init(void) {
/* MPU initialization.*/ /* MPU initialization.*/
#if (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) || (STM32_NOCACHE_SRAM3 == TRUE) || \ #if (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) || (STM32_NOCACHE_SRAM3 == TRUE) || \
(STM32_NOCACHE_SRAM4 == TRUE) (STM32_NOCACHE_ALLSRAM == TRUE)
{ {
uint32_t base, size; uint32_t base, size;
#if (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == TRUE) #if (STM32_NOCACHE_ALLSRAM == TRUE)
base = 0x30000000U;
size = MPU_RASR_SIZE_256M;
#elif (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == TRUE)
base = 0x30000000U; base = 0x30000000U;
size = MPU_RASR_SIZE_512K; size = MPU_RASR_SIZE_512K;
#elif (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == FALSE) #elif (STM32_NOCACHE_SRAM1_SRAM2 == TRUE) && (STM32_NOCACHE_SRAM3 == FALSE)
@ -181,9 +184,6 @@ void hal_lld_init(void) {
#elif (STM32_NOCACHE_SRAM1_SRAM2 == FALSE) && (STM32_NOCACHE_SRAM3 == TRUE) #elif (STM32_NOCACHE_SRAM1_SRAM2 == FALSE) && (STM32_NOCACHE_SRAM3 == TRUE)
base = 0x30040000U; base = 0x30040000U;
size = MPU_RASR_SIZE_16K; size = MPU_RASR_SIZE_16K;
#elif (STM32_NOCACHE_SRAM4 == TRUE)
base = 0x38000000U;
size = MPU_RASR_SIZE_16K;
#else #else
#error "invalid constants used in mcuconf.h" #error "invalid constants used in mcuconf.h"
#endif #endif

2
Makefile
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@ -148,7 +148,7 @@ CPPWARN = -Wall -Wextra -Wundef
# #
# List all user C define here, like -D_DEBUG=1 # List all user C define here, like -D_DEBUG=1
UDEFS = #-DSTM32_ENFORCE_H7_REV_V # Must be removed for non-Rev-V devices. UDEFS = -DCORTEX_ENABLE_WFI_IDLE=FALSE
# Define ASM defines here # Define ASM defines here
UADEFS = UADEFS =

25
STM32H723xG.ld
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@ -18,30 +18,31 @@
* STM32H743xI generic setup. * STM32H743xI generic setup.
* *
* AXI SRAM - BSS, Data, Heap. * AXI SRAM - BSS, Data, Heap.
* SRAM1+SRAM2 - None. * SRAM1 - SIGGEN.
* SRAM4 - NOCACHE. * SRAM2 - DAC.
* SRAM4 - ADC.
* DTCM-RAM - Main Stack, Process Stack. * DTCM-RAM - Main Stack, Process Stack.
* ITCM-RAM - STMDSP Algorithm. * ITCM-RAM - STMDSP Algorithm.
* BCKP SRAM - None. * BCKP SRAM - None.
*/ */
MEMORY MEMORY
{ {
flash0 (rx) : org = 0x08000000, len = 1M /* Flash bank1+bank2 */ flash0 (rx) : org = 0x08000000, len = 1M /* Flash bank1+bank2 */
flash1 (rx) : org = 0x08000000, len = 512K /* Flash bank 1 */ flash1 (rx) : org = 0x08000000, len = 512K /* Flash bank 1 */
flash2 (rx) : org = 0x08080000, len = 512K /* Flash bank 2 */ flash2 (rx) : org = 0x08080000, len = 512K /* Flash bank 2 */
flash3 (rx) : org = 0x00000000, len = 0 flash3 (rx) : org = 0x00000000, len = 0
flash4 (rx) : org = 0x00000000, len = 0 flash4 (rx) : org = 0x00000000, len = 0
flash5 (rx) : org = 0x00000000, len = 0 flash5 (rx) : org = 0x00000000, len = 0
flash6 (rx) : org = 0x00000000, len = 0 flash6 (rx) : org = 0x00000000, len = 0
flash7 (rx) : org = 0x00000000, len = 0 flash7 (rx) : org = 0x00000000, len = 0
ram0 (wx) : org = 0x24000000, len = 320k /* AXI SRAM */ ram0 (wx) : org = 0x24000000, len = 320k /* AXI SRAM */
ram1 (wx) : org = 0x30000000, len = 32k /* AHB SRAM1+SRAM2 */ ram1 (wx) : org = 0x30000000, len = 16k /* AHB SRAM1 */
ram2 (wx) : org = 0x30004000, len = 16k /* AHB SRAM2 */ ram2 (wx) : org = 0x30004000, len = 16k /* AHB SRAM2 */
ram3 (wx) : org = 0x38000000, len = 16k /* AHB SRAM4 */ ram3 (wx) : org = 0x38000000, len = 16k /* AHB SRAM4 */
ram4 (wx) : org = 0x00000000, len = 0 ram4 (wx) : org = 0x00000000, len = 0
ram5 (wx) : org = 0x20000000, len = 128k /* DTCM-RAM */ ram5 (wx) : org = 0x20000000, len = 128k /* DTCM-RAM */
ram6 (wx) : org = 0x00000000, len = 64k /* ITCM-RAM */ ram6 (wx) : org = 0x00000000, len = 64k /* ITCM-RAM */
ram7 (wx) : org = 0x38800000, len = 4k /* BCKP SRAM */ ram7 (wx) : org = 0x38800000, len = 4k /* BCKP SRAM */
} }
/* For each data/text section two region are defined, a virtual region /* For each data/text section two region are defined, a virtual region
@ -97,7 +98,7 @@ INCLUDE rules_stacks.ld
/*===========================================================================*/ /*===========================================================================*/
/* RAM region to be used for nocache segment.*/ /* RAM region to be used for nocache segment.*/
REGION_ALIAS("NOCACHE_RAM", ram3); /*REGION_ALIAS("NOCACHE_RAM", ram3);*/
/* RAM region to be used for eth segment.*/ /* RAM region to be used for eth segment.*/
/*REGION_ALIAS("ETH_RAM", ram3);*/ /*REGION_ALIAS("ETH_RAM", ram3);*/
@ -105,7 +106,7 @@ REGION_ALIAS("NOCACHE_RAM", ram3);
SECTIONS SECTIONS
{ {
/* Special section for non cache-able areas.*/ /* Special section for non cache-able areas.*/
.nocache (NOLOAD) : ALIGN(4) /*.nocache (NOLOAD) : ALIGN(4)
{ {
__nocache_base__ = .; __nocache_base__ = .;
*(.nocache) *(.nocache)
@ -113,7 +114,7 @@ SECTIONS
*(.bss.__nocache_*) *(.bss.__nocache_*)
. = ALIGN(4); . = ALIGN(4);
__nocache_end__ = .; __nocache_end__ = .;
} > NOCACHE_RAM } > NOCACHE_RAM*/
/* Special section for Ethernet DMA non cache-able areas.*/ /* Special section for Ethernet DMA non cache-able areas.*/
/*.eth (NOLOAD) : ALIGN(4) /*.eth (NOLOAD) : ALIGN(4)

8
cfg/halconf.h
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@ -230,7 +230,7 @@
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) #if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
#define ADC_USE_WAIT TRUE #define ADC_USE_WAIT FALSE
#endif #endif
/** /**
@ -238,7 +238,7 @@
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) #if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define ADC_USE_MUTUAL_EXCLUSION TRUE #define ADC_USE_MUTUAL_EXCLUSION FALSE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
@ -290,7 +290,7 @@
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) #if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__)
#define DAC_USE_WAIT TRUE #define DAC_USE_WAIT FALSE
#endif #endif
/** /**
@ -298,7 +298,7 @@
* @note Disabling this option saves both code and data space. * @note Disabling this option saves both code and data space.
*/ */
#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) #if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
#define DAC_USE_MUTUAL_EXCLUSION TRUE #define DAC_USE_MUTUAL_EXCLUSION FALSE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/

4
cfg/mcuconf.h
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@ -46,8 +46,8 @@
*/ */
#define STM32_NOCACHE_MPU_REGION MPU_REGION_6 #define STM32_NOCACHE_MPU_REGION MPU_REGION_6
#define STM32_NOCACHE_SRAM1_SRAM2 FALSE #define STM32_NOCACHE_SRAM1_SRAM2 FALSE
#define STM32_NOCACHE_SRAM3 FALSE // keep #define STM32_NOCACHE_SRAM3 FALSE
#define STM32_NOCACHE_SRAM4 TRUE #define STM32_NOCACHE_ALLSRAM TRUE
/* /*
* PWR system settings. * PWR system settings.

2
gui/stmdsp.hpp
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@ -19,7 +19,7 @@
namespace stmdsp namespace stmdsp
{ {
constexpr unsigned int SAMPLES_MAX = 3000; constexpr unsigned int SAMPLES_MAX = 4000;
class scanner class scanner
{ {

2
gui/wxmain.cpp
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@ -47,7 +47,7 @@ static const std::array<unsigned int, 6> srateNums {
static const char *makefile_text = R"make( static const char *makefile_text = R"make(
all: all:
@arm-none-eabi-g++ -x c++ -Os -fno-exceptions -fno-rtti \ @arm-none-eabi-g++ -x c++ -Os -fno-exceptions -fno-rtti \
-mcpu=cortex-m4 -mthumb -mfloat-abi=hard -mfpu=fpv4-sp-d16 -mtune=cortex-m4 \ -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 -mtune=cortex-m7 \
-nostartfiles \ -nostartfiles \
-Wl,-Ttext-segment=0x00000000 -Wl,-zmax-page-size=512 -Wl,-eprocess_data_entry \ -Wl,-Ttext-segment=0x00000000 -Wl,-zmax-page-size=512 -Wl,-eprocess_data_entry \
$0 -o $0.o $0 -o $0.o

2
source/adc.cpp
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@ -24,7 +24,7 @@ ADCConversionGroup ADC::m_group_config = {
.end_cb = ADC::conversionCallback, .end_cb = ADC::conversionCallback,
.error_cb = nullptr, .error_cb = nullptr,
.cfgr = ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(13), /* TIM6_TRGO */ .cfgr = ADC_CFGR_EXTEN_RISING | ADC_CFGR_EXTSEL_SRC(13), /* TIM6_TRGO */
.cfgr2 = ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_0 | ADC_CFGR2_OVSS_1, // Oversampling 2x .cfgr2 = ADC_CFGR2_ROVSE | ADC_CFGR2_OVSR_1 | ADC_CFGR2_OVSS_0, // Oversampling 2x
.ccr = 0, .ccr = 0,
.pcsel = 0, .pcsel = 0,
.ltr1 = 0, .htr1 = 0x0FFF, .ltr1 = 0, .htr1 = 0x0FFF,

15
source/common.hpp
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@ -1,12 +1,12 @@
#include <array> #include <array>
#include <cstdint> #include <cstdint>
//#define ENABLE_SIGGEN
constexpr unsigned int MAX_SAMPLE_BUFFER_SIZE = 4000;
using Sample = uint16_t; using Sample = uint16_t;
// gives 8000
constexpr unsigned int MAX_SAMPLE_BUFFER_BYTESIZE = 16384;
constexpr unsigned int MAX_SAMPLE_BUFFER_SIZE = MAX_SAMPLE_BUFFER_BYTESIZE / sizeof(Sample);
class SampleBuffer class SampleBuffer
{ {
public: public:
@ -14,12 +14,6 @@ public:
m_buffer(buffer) {} m_buffer(buffer) {}
void clear() { void clear() {
/*static const Sample ref[21] = {
100, 200, 400, 600, 800, 1000, 1200, 1400, 1600, 1800,
2000, 2200, 2400, 2600, 2800, 3000, 3200, 3400, 3600, 3800, 4095
};
for (unsigned int i = 0; i < m_size; i++)
m_buffer[i] = ref[i % 21];*/
std::fill(m_buffer, m_buffer + m_size, 2048); std::fill(m_buffer, m_buffer + m_size, 2048);
} }
void modify(Sample *data, unsigned int srcsize) { void modify(Sample *data, unsigned int srcsize) {
@ -60,7 +54,6 @@ public:
} }
private: private:
//std::array<Sample, MAX_SAMPLE_BUFFER_SIZE> m_buffer;
Sample *m_buffer = nullptr; Sample *m_buffer = nullptr;
unsigned int m_size = MAX_SAMPLE_BUFFER_SIZE; unsigned int m_size = MAX_SAMPLE_BUFFER_SIZE;
Sample *m_modified = nullptr; Sample *m_modified = nullptr;

4
source/error.hpp
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@ -27,6 +27,10 @@ public:
return condition; return condition;
} }
bool hasError() {
return m_index > 0;
}
Error pop() { Error pop() {
return m_index == 0 ? Error::None : m_queue[--m_index]; return m_index == 0 ? Error::None : m_queue[--m_index];
} }

48
source/main.cpp
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@ -53,11 +53,9 @@ static time_measurement_t conversion_time_measurement;
static ErrorManager EM; static ErrorManager EM;
static SampleBuffer samplesIn (reinterpret_cast<Sample *>(0x38000000)); static SampleBuffer samplesIn (reinterpret_cast<Sample *>(0x38000000)); // 16k
static SampleBuffer samplesOut (reinterpret_cast<Sample *>(0x38002000)); static SampleBuffer samplesOut (reinterpret_cast<Sample *>(0x30004000)); // 16k
#ifdef ENABLE_SIGGEN static SampleBuffer samplesSigGen (reinterpret_cast<Sample *>(0x30000000)); // 16k
static SampleBuffer samplesSigGen;
#endif
static unsigned char elf_file_store[MAX_ELF_FILE_SIZE]; static unsigned char elf_file_store[MAX_ELF_FILE_SIZE];
static ELF::Entry elf_entry = nullptr; static ELF::Entry elf_entry = nullptr;
@ -75,8 +73,6 @@ int main()
halInit(); halInit();
chSysInit(); chSysInit();
//SCB_DisableDCache();
// Enable FPU // Enable FPU
SCB->CPACR |= 0xF << 20; SCB->CPACR |= 0xF << 20;
@ -88,10 +84,8 @@ int main()
SClock::setRate(SClock::Rate::R32K); SClock::setRate(SClock::Rate::R32K);
ADC::setRate(SClock::Rate::R32K); ADC::setRate(SClock::Rate::R32K);
// Start the conversion manager thread
chTMObjectInit(&conversion_time_measurement); chTMObjectInit(&conversion_time_measurement);
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, nullptr);
nullptr);
chThdCreateStatic(conversionThreadWA, sizeof(conversionThreadWA), chThdCreateStatic(conversionThreadWA, sizeof(conversionThreadWA),
NORMALPRIO, conversionThread, nullptr); NORMALPRIO, conversionThread, nullptr);
@ -130,7 +124,6 @@ void main_loop()
case 'd': case 'd':
USBSerial::write(samplesOut.bytedata(), samplesOut.bytesize()); USBSerial::write(samplesOut.bytedata(), samplesOut.bytesize());
break; break;
#ifdef ENABLE_SIGGEN
case 'D': case 'D':
if (EM.assert(USBSerial::read(&cmd[1], 2) == 2, Error::BadParamSize)) { if (EM.assert(USBSerial::read(&cmd[1], 2) == 2, Error::BadParamSize)) {
unsigned int count = cmd[1] | (cmd[2] << 8); unsigned int count = cmd[1] | (cmd[2] << 8);
@ -140,7 +133,6 @@ void main_loop()
} }
} }
break; break;
#endif
// 'E' - Reads in and loads the compiled conversion code binary from USB. // 'E' - Reads in and loads the compiled conversion code binary from USB.
case 'E': case 'E':
@ -253,14 +245,12 @@ void main_loop()
} }
break; break;
#ifdef ENABLE_SIGGEN
case 'W': case 'W':
DAC::start(1, samplesSigGen.data(), samplesSigGen.size()); DAC::start(1, samplesSigGen.data(), samplesSigGen.size());
break; break;
case 'w': case 'w':
DAC::stop(1); DAC::stop(1);
break; break;
#endif
default: default:
break; break;
@ -333,19 +323,25 @@ void signal_operate_measure(adcsample_t *buffer, [[maybe_unused]] size_t count)
THD_FUNCTION(Thread1, arg) THD_FUNCTION(Thread1, arg)
{ {
(void)arg; (void)arg;
bool erroron = false;
while (1) { while (1) {
palSetLine(LINE_LED1); bool isidle = run_status == RunStatus::Idle;
chThdSleepMilliseconds(70); auto led = isidle ? LINE_LED_GREEN : LINE_LED_YELLOW;
palSetLine(LINE_LED2); auto delay = isidle ? 500 : 250;
chThdSleepMilliseconds(70);
palSetLine(LINE_LED3); palSetLine(led);
chThdSleepMilliseconds(240); chThdSleepMilliseconds(delay);
palClearLine(LINE_LED1); palClearLine(led);
chThdSleepMilliseconds(70); chThdSleepMilliseconds(delay);
palClearLine(LINE_LED2);
chThdSleepMilliseconds(70); if (auto err = EM.hasError(); err ^ erroron) {
palClearLine(LINE_LED3); erroron = err;
chThdSleepMilliseconds(240); if (err)
palSetLine(LINE_LED_RED);
else
palClearLine(LINE_LED_RED);
}
} }
} }

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